Key Specifications
Timing Analysis (Asynchronous Sampling)
Up to 125 ps (8 GHz), 400 M sample deep conventional timing analysis (2 GHz full-channel / 4 GHz half-channel / 8 GHz quarter-channel )
2 GHz transitional timing
State Analysis (Synchronous Sampling)
State clock rates up to 2 GHz
Data rates up to 2 Gb/s (Double Data Rate – DDR) addresses all DDR speeds
Automated threshold/sample position setup for accurate measurements on high-speed buses
Simultaneous eye diagrams on all channels identify problems signals quickly
Configuration Considerations
68-channels per module, combine up to 5 modules for 340 channels
Selectable memory depths: 4 M, 16 M, 32 M, 64 M, 100 M
Compatible with 90-pin logic analyzer probes. Probes are ordered separately. Keysight’s Probe Recommendations
Compatible with 16902B logic analyzer mainframes
Additional Capabilities
2 GHz trigger sequencer enables reliable trigger and capture of DDR3 1600 signals at speed
Comprehensive single-ended and differential support, threshold is adjustable Keysight Probe Recommendations
Options032: Increase acquisition memory depth to 32M
